Heterogeneous integration is becoming an important direction for the continuation of semiconductor technology in the post-Moore era, and may become the mainstream technology for system-level chips in the next 30 years, pushing integrated circuits into the era of heterogeneous integration. However, heterogeneous integration still has a long way to go to break the traditional "road" thinking of integrated circuits.

An important way to bypass Moore's Law

We are currently in an era of booming digital economy, with applications such as high-performance computing, cloud computing and virtualization, and big data analysis developing rapidly. This series of application scenarios will also bring a very large workload to the processor and require the support of powerful computing power.

Pan Xiaoming, AMD's global senior vice president and president of Greater China, said that in the golden age of semiconductor design, people can reduce the cost of each transistor through technological advancements while improving performance. However, every time we enter a new node, it takes longer to ensure the maturity and stability of the process, and the cost of the new process is increasing significantly. This brings new challenges to people, and we need to explore more innovations in other aspects to further improve processor performance and computing power. Heterogeneous integration is becoming an important development direction for improving chip computing power.

So, what is heterogeneous integration? Song Jiqiang, vice president of Intel Research and director of Intel China Research, pointed out that heterogeneous integration is the combination of hardware with different process architectures, different instruction sets, and different functions into a computing system. At the same time, heterogeneous integration is also the collaboration of chips, packages, systems, and software. It is not a single technical point, but a synthesis of multiple technical points, involving the integration of devices, design, software algorithms, etc., to achieve an efficient heterogeneous system.

Moore's Law has actually become a banner for the semiconductor industry, but people must get rid of their obsession with process node shrinkage to promote the continued evolution of semiconductor technology. 

In this regard, Mao Junfa, an academician of the Chinese Academy of Sciences, pointed out that there are currently two main development routes for semiconductor technology: continuing Moore’s Law and detouring Moore’s Law. When continuing Moore's Law faces a series of extreme challenges, including the limits of physical principles, technical means, and economic costs, detouring from Moore's Law is a feasible way of development. Heterogeneous integrated circuits are one of the important ways to bypass Moore's Law.

Mao Junfa emphasized that the scientific significance of studying semiconductor heterogeneous integration is also significant. Through integrated circuits, integrated circuits can develop from the current single homogeneous process to the integration of multiple heterogeneous processes, and from the current two-dimensional planar integration to the three-dimensional integration, thereby realizing high-performance complex systems. The characteristics of heterogeneous integration are outstanding. First, it can integrate different semiconductor materials, processes, structures and components; second, it adopts system design concepts; third, it applies advanced technologies such as IP and chiplets, with 2.5-dimensional or 3-dimensional high-density structures. As a result, heterogeneous integrated chips can achieve powerful and complex functions, breaking through the performance limits of a single semiconductor process; at the same time, they have strong flexibility, high reliability, short research and development cycles, and can achieve miniaturization and lightweight.

Major international manufacturers have launched heterogeneous integration technologies

Because of these advantages, heterogeneous integration has become the main route for the development of semiconductor technology in the post-Moore era, and more and more mainstream manufacturers attach great importance to it. At this year's Computex (Taipei Computer Show), AMD released an experimental product Ryzen 5000, which uses TSMC's 3D Fabric advanced packaging technology to successfully package chiplets containing a 64MB L3 Cache with the processor in a 3D stack. According to AMD, this technology can increase the interconnect density by more than 200 times for 2D chips, and can also reach more than 15 times compared with existing 3D packaging solutions.

Based on the development of heterogeneous integration technology, Intel proposed the concept of XPU. Song Jiqiang said: "For Intel, we promote the innovation of heterogeneous computing through the heterogeneous integration of XPUs of different architectures and the unified cross-architecture programming model oneAPI to achieve software and hardware collaboration to meet more workloads, achieve high energy efficiency, help customers reduce costs, and quickly provide solutions according to needs."

At last year's "Architecture Day", Intel launched Hybrid Bonding technology based on EMIB (Embedded Multi-chip Interconnect Bridge) 2D packaging, Foveros 3D packaging, and CO-EMIB technology that combines 2D and 3D. Obtaining higher current carrying capacity through electrical connections, accelerating the realization of bump pitches of 10 microns and below, bringing higher interconnect density, bandwidth and lower power consumption to heterogeneous media.

Not only Intel and AMD, but also leading international chip manufacturers including NVIDIA, Qualcomm, Xilinx, etc. attach great importance to heterogeneous integration technology. Domestically, companies such as Unisoc, Beijing Ingenics, and Vimicro are also actively conducting research and development on heterogeneous integration and launching related products and solutions. The newly launched Tanggula T770 by UNISOC integrates 4-core ARM A76, 4-core ARM A55, Mali-G57 GPU and baseband chips, etc. It is a typical application of heterogeneous integration.

Need to break the traditional "road" thinking

Although the development prospects of heterogeneous integration are very broad, it is not easy to realize it. Mao Junfa emphasized that since media with different properties and functions are closely coupled and often conflict with each other, when designing heterogeneous circuits, it is necessary to solve electromagnetic-thermal-stress, multi-physics collaborative design, and multi-functional collaborative design issues of active/passive circuit antennas and digital/analog circuits. In terms of process manufacturing, the adjustment of heterogeneous integration process parameters will also be affected by the multi-physical properties of electricity, heat, and stress. It is necessary to understand their internal relationships and master the process quantitative design and optimization mechanisms.

Song Jiqiang also believes that heterogeneous integration needs to break away from a single architecture in terms of hardware, and the XPU architecture that integrates multiple architectures will become mainstream. The birth of the XPU architecture has put forward higher requirements for software, because developers who can master multiple architecture programming languages ​​at the same time are rare, and software is a key part of releasing hardware performance. Software models that can program across architectures and tools that can improve programming efficiency are extremely important.

Intel has proposed six technical pillars, which played a key role in the implementation of XPU, including process, architecture, memory, interconnection, security and software. Although heterogeneous computing seems to be a hardware-level content, to unleash its capabilities requires the integration of chips, systems, and software before it can play a role. The first is the chip layer, which refers to the heterogeneity within the chip package and is closely related to the concept of "small chips"; the second is the system layer, which refers to the integration of multi-functional and multi-architecture computing architectures; the third is the software layer, the unified cross-architecture programming model oneAPI, which can provide developers with the convenience of programming on different architectures through a set of software interfaces and a set of function libraries.

In the face of the development of heterogeneous integration, Mao Junfa proposed an overall research idea, which is to break the traditional "road" thinking of integrated circuits, based on the coupled multi-physics theory, guided by the formation of heterogeneous integration capabilities, combining fields and roads to lead the technical direction of semiconductor heterogeneous integrated circuits.

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